Phase-Locked Loop Circuit, Data Recovery Circuit, and Control Method for Phase-Locked Loop Circuit

摘要

A phase-locked loop circuit, which includes a phase frequency detector, a charge pump, a loop low-pass filter, a first voltage-current converter, a second voltage-current converter, a current-controlled oscillator, a frequency divider, a comparator, and a mode controller, where the mode controller is configured to control the switches S1, S2, and S3 included in the loop low-pass filter to connect or disconnect. Using the phase-locked loop circuit, a voltage value of a second control voltage signal VC2 provided for the first voltage-current converter can reach, in a relatively short time, a voltage value of a first control voltage signal VC1 provided for the second voltage-current converter, thereby increasing a speed of establishing the phase-locked loop circuit and implementing a quick response of the phase-locked loop circuit.

主权项

1. A phase-locked loop circuit, comprising:
a first voltage-current converter; a second voltage-current converter; a current-controlled oscillator; a frequency divider; a phase frequency detector configured to:
receive a reference source signal and a feedback signal that is output by the frequency divider; andgenerate a first error signal; a charge pump coupled to the phase frequency detector and configured to generate a first voltage signal according to the first error signal that is output by the phase frequency detector; a loop low-pass filter, comprising a first filter, a second filter, a third node, and a fourth node, a switch (S1), a switch (S2), and a switch (S3), wherein the first filter is configured to filter out a high frequency component in the first voltage signal that is output by the charge pump and generate a first control voltage signal (VC1) to provide for the second voltage-current converter, wherein the second filter is configured to filter out the high frequency component in the first voltage signal that is output by the charge pump and generate a second control voltage signal (VC2) to provide for the first voltage-current converter, wherein the first filter comprises a first resistor (R1) and a first capacitor (C1), wherein the R1 and the C1 are connected in series, wherein the second filter comprises a second resistor (R2) and a second capacitor (C2), wherein the R2 and the C2 are connected in series, wherein the third node is a node for taking out the VC1, wherein the fourth node is another node for taking out the VC2, wherein a first end of the S1 is coupled to a first node between the R1 and the C1, wherein a second end of the S1 is coupled to a second node between the R2 and the C2, wherein two ends of the S2 are respectively coupled to the first node and the fourth node, and wherein two ends of the S3 are respectively coupled to the third node and the fourth node; and a mode controller coupled to the loop low-pass filter and configured to control the S1 to alternatively connect and disconnect, the S2 to connect, and the S3 to disconnect in the loop low-pass filter when a bandwidth of the phase-locked loop circuit is less than a bandwidth threshold, wherein the first voltage-current converter is coupled to the loop low-pass filter and configured to:
convert the received VC2 into a current signal; andinput the current signal to the current-controlled oscillator; wherein the second voltage-current converter is coupled to the loop low-pass filter and configured to:
convert the received VC1 into another current signal; andinput the other current signal to the current-controlled oscillator, wherein the current-controlled oscillator is configured to generate, according to received current signals, a phase-locked loop output signal whose frequency is a target frequency, wherein one end of the frequency divider is coupled to the current-controlled oscillator and the other end is coupled to the phase frequency detector, and wherein the frequency divider is configured to:
perform frequency division on the frequency of the phase-locked loop output signal that is output by the current-controlled oscillator;set a signal that is obtained after the frequency division as a frequency division feedback signal; andsend the frequency division feedback signal to the phase frequency detector.