发明名称 |
INTEGRATED CIRCUIT COMPOSED OF TUNNEL FIELD-EFFECT TRANSISTORS AND METHOD FOR MANUFACTURING SAME |
摘要 |
The present invention provides an integrated circuit formed of tunneling field-effect transistors that includes a first tunneling field-effect transistor in which one of a first P-type region and a first N-type region operates as a source region and the other one operates as a drain region; and a second tunneling field-effect transistor in which one of a second P-type region and a second N-type region operates as a source region and the other one operates as a drain region, the first and second tunneling field-effect transistors being formed in one active region to have the same polarity, the first P-type region and the second N-type region being formed adjacently, the adjacent first P-type region and second N-type region being electrically connected through metal semiconductor alloy film. |
申请公布号 |
US2017077092(A1) |
申请公布日期 |
2017.03.16 |
申请号 |
US201515125263 |
申请日期 |
2015.02.20 |
申请人 |
NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY |
发明人 |
MORI Takahiro |
分类号 |
H01L27/088;H01L21/265;H01L27/12;H01L29/417;H01L21/8234;H01L21/84 |
主分类号 |
H01L27/088 |
代理机构 |
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代理人 |
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主权项 |
1. An integrated circuit formed of tunneling field-effect transistors, the integrated circuit comprising:
a first tunneling field-effect transistor in which one of a first P-type region and a first N-type region operates as a source region and the other one operates as a drain region; and a second tunneling field-effect transistor in which one of a second P-type region and a second N-type region operates as a source region and the other one operates as a drain region, the first tunneling field-effect transistor and the second tunneling field-effect transistor being formed in one active region to have a same polarity, the first P-type region and the second N-type region being formed adjacently, the first P-type region and the second N-type region that are adjacent being electrically connected with each other through a metal semiconductor alloy film, wherein the metal semiconductor alloy film is formed in a manner to bridge the first P-type region and the second N-type region that are formed down to predetermined formation depths from a surface of a semiconductor layer and are disposed in a manner to face each other, and the metal semiconductor alloy film is formed down to a depth equal to or deeper than the formation depths of the first P-type region and the second N-type region from a position of the surface of the semiconductor layer. |
地址 |
Tokyo JP |