| 发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
| 摘要 |
A semiconductor memory device includes a memory cell includes a charge storage layer, a word line that is connected to a gate of the memory cell, and a controller that performs a write operation on the memory cell by applying a write voltage to the word line, and a verify operation to verify a threshold voltage of the memory cell after the write operation. The verify operation includes a first verify operation using a first verify voltage, and a second verify operation using a second verify voltage higher than the first verify voltage. |
| 申请公布号 |
US2017076815(A1) |
申请公布日期 |
2017.03.16 |
| 申请号 |
US201615233651 |
申请日期 |
2016.08.10 |
| 申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SUZUKI Shinji |
| 分类号 |
G11C16/34;G11C16/04;G11C16/08;G11C16/10 |
主分类号 |
G11C16/34 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor memory device comprising:
a memory cell that includes a charge storage layer; a word line that is connected to a gate of the memory cell; and a controller that performs a write operation on the memory cell by applying a write voltage to the word line, and a verify operation to verify a threshold voltage of the memory cell after the write operation, wherein the verify operation includes a first verify operation using a first verify voltage, and a second verify operation using a second verify voltage higher than the first verify voltage. |
| 地址 |
Tokyo JP |
