发明名称 INCREMENTAL REGISTER RETIMING OF AN INTEGRATED CIRCUIT DESIGN
摘要 A first circuit design description may have registers and combinational gates. Circuit design computing equipment may perform register retiming on the first circuit design description, whereby registers are moved across combinational gates during a first circuit design implementation. An engineering-change-order (ECO) of the first circuit design may result in a second circuit design. The differences between the first and second circuit designs may be confined to a region-of-change. The circuit design computing equipment may preserve the results from the first circuit design implementation and re-use portions of these results during the implementation of the second circuit design. For example, the circuit design computing equipment may preserve the register retiming solution from the first circuit design implementation for portions of the second circuit design that are outside the region-of-change and incrementally create graphs that allow to incrementally solve the register retiming problem during the second circuit design implementation.
申请公布号 EP3139291(A3) 申请公布日期 2017.03.15
申请号 EP20160185413 申请日期 2016.08.24
申请人 Altera Corporation 发明人 Sinnadurai, Nishanth;Chiu, Gordon Raymond
分类号 G06F17/50 主分类号 G06F17/50
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