Semiconductor memory device with input/output line

摘要

Various embodiments relate to a semiconductor device. The semiconductor device may include a plurality of mats configured to input and output the data of memory cells through a plurality of mat input/output lines. The semiconductor device may include a plurality of input/output lines coupled to the plurality of mat input/output lines and configured to input and output data. The semiconductor device may include mat control units disposed between the plurality of mats and configured to control the operations of the mats. The plurality of mat input/output lines may be grouped into a plurality of data line groups having the same characteristic, and some of the plurality of data line groups may be disposed to overlap with the mat control units.

主权项

1. A semiconductor device, comprising:
a plurality of mats configured to input and output data of memory cells through a plurality of mat input/output lines; a plurality of input/output lines coupled to the plurality of mat input/output lines and configured to input and output data; and mat control units disposed between the plurality of mats and configured to control operations of the mats, wherein the plurality of mat input/output lines is grouped into a plurality of data line groups having an identical characteristic, and some of the plurality of data line groups are disposed to overlap with the mat control units, wherein a size of each of the plurality of mats is a sum of the size of one of the plurality of data line groups and half a size of an adjacent data line group.