发明名称 |
Semiconductor memory device |
摘要 |
A semiconductor memory device includes a memory string on a well, the memory string including a memory cell connected in series between first and second select transistors, a bit line and a source line respectively connected to the first and second select transistors, a well line connected to the well, first and second select lines respectively connected to gates of the first and second select transistors, a word line connected to a gate of the memory cell transistor, and a control circuit that performs a write operation on the first select transistor, the write operation including a pre-charge operation of the bit line, in which a first voltage is applied to the word line and the second select line, a second voltage higher than the first voltage to the source line and the well line, and a third voltage higher than the first voltage to the first select line. |
申请公布号 |
US9589648(B1) |
申请公布日期 |
2017.03.07 |
申请号 |
US201615061967 |
申请日期 |
2016.03.04 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Maeda Takashi |
分类号 |
G11C16/04;G11C16/10;G11C16/34 |
主分类号 |
G11C16/04 |
代理机构 |
Patterson & Sheridan, LLP |
代理人 |
Patterson & Sheridan, LLP |
主权项 |
1. A semiconductor memory device comprising:
a memory string that is formed on a well, the memory string including a first select transistor, a memory cell transistor, and a second select transistor connected in series; a bit line connected to one end of the first select transistor; a source line connected to one end of the second select transistor; a well line connected to the well; a first select line connected to a gate of the first select transistor; a word line connected to a gate of the memory cell transistor; a second select line connected to a gate of the second select transistor; and a control circuit configured to perform a write operation on the first select transistor, wherein in the write operation, a pre-charge operation of the bit line is performed before a program voltage is applied to the first select line, and in the pre-charge operation, a first voltage is applied to the word line and the second select line, a second voltage higher than the first voltage is applied to the source line and the well line, and a third voltage higher than the first voltage is applied to the first select line. |
地址 |
Tokyo JP |