发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
摘要 Improvements are achieved in the performance and reliability of a semiconductor device. In a trench in an n-type semiconductor substrate, a gate electrode for a trench-gate field effect transistor is formed via a gate insulating film. A p-type semiconductor region for channel formation is formed so as to be adjacent to the trench. Over the p-type semiconductor region, a source n+-type semiconductor region is formed so as to be adjacent to the trench. In the semiconductor substrate, a first p-type column is formed under the p-type semiconductor region. Under the first p-type column, a second p-type column is formed. The first p-type column is internally included in the second p-type column in plan view. The two-dimensional size of the second p-type column is larger than the two-dimensional size of the first p-type column.
申请公布号 US2017062556(A1) 申请公布日期 2017.03.02
申请号 US201615218004 申请日期 2016.07.23
申请人 Renesas Electronics Corporation 发明人 TAKIZAWA Junichi
分类号 H01L29/06;H01L21/266;H01L29/66;H01L21/265;H01L29/78;H01L29/10 主分类号 H01L29/06
代理机构 代理人
主权项 1. A semiconductor device having a trench-gate field effect transistor, comprising: a semiconductor substrate having a first conductivity type; a trench formed in a main surface of the semiconductor substrate; a gate electrode for the trench-gate field effect transistor formed in the trench via a gate insulating film; a first semiconductor region having a second conductivity type opposite to the first conductivity type and formed in the semiconductor substrate so as to be adjacent to the trench, the first semiconductor region being for forming a channel of the trench-gate field effect transistor; a second semiconductor region having the first conductivity type and formed over the first semiconductor region in the semiconductor substrate so as to be adjacent to the trench, the second semiconductor region being for a source of the trench-gate field effect transistor; a third semiconductor region having the second conductivity type and formed under the first semiconductor region in the semiconductor substrate; a fourth semiconductor region having the second conductivity type and formed under the third semiconductor region in the semiconductor substrate; and a back-surface electrode formed over a back surface of the semiconductor substrate which is opposite to the main surface thereof, the back-surface electrode being for a drain of the trench-gate field effect transistor, wherein the third semiconductor region is internally included in the fourth semiconductor region in plan view, and wherein a two-dimensional size of the fourth semiconductor region is larger than a two-dimensional size of the third semiconductor region.
地址 Tokyo JP