SEMICONDUCTOR MEMORY DEVICE

摘要

Provided herein is a semiconductor memory device including: a memory cell array having a multilayer stacked structure; and a peripheral circuit configured to drive the memory cell array. The peripheral circuit includes a power decoupling capacitor circuit configured to provide decoupling capacitors to the memory cell array and the peripheral circuit. The power decoupling capacitor circuit includes conductive lines which are alternately stacked on top of one another, a plurality of semiconductor pillars configured to pass through the conductive lines, a horizontal connector configured to connect the semiconductor pillars to each other, and a vertical connector configured to pass through the conductive lines and insulated from the horizontal connector.

主权项

1. A semiconductor memory device comprising:
a memory cell array having a multilayer stacked structure; and a peripheral circuit configured to drive the memory cell array, wherein the peripheral circuit comprises a power decoupling capacitor circuit configured to provide decoupling capacitors to the memory cell array and the peripheral circuit, wherein the power decoupling capacitor circuit comprises:
conductive lines alternately stacked on top of one another;a plurality of semiconductor pillars configured to pass through the conductive lines;a horizontal connector configured to connect the semiconductor pillars to each other; anda vertical connector configured to pass through the conductive lines and insulated from the horizontal connector.