Information processing apparatus and bus control method

摘要

An information processing apparatus includes: a plurality of memories; a plurality of buses each connected to each of the memories; an input/output device configured to make access to the plurality of memories; a processing unit configured to alter a mapping of a logical address and a physical address of a memory area used by the input/output device; and a switch configured to transfer access from the input/output device to any one of the plurality of buses based on the mapping, whereby the performance deterioration due to bus conflict is suppressed.

主权项

1. An information processing apparatus comprising:
a plurality of memories; a plurality of buses each connected to each of the memories; an input/output device configured to make access to the plurality of memories; a processor coupled to the plurality of memories and configured to execute a process comprising;
collecting information regarding usage status of the buses themselves used by the input/output device for accessing the memories, andaltering, based on the collected information, a mapping of a logical address and a physical address of a memory area used by the input/output device; and a bus switch to store a route table and configured to perform access routing from the input/output device to any one of the plurality of buses based on the mapping.