发明名称 PROCESSOR INSTRUCTION SEQUENCE TRANSLATION
摘要 Method for translating a sequence of instructions is disclosed herein. In one embodiment, the method includes recognizing a candidate multi-instruction sequence, determining that the multi-instruction sequence corresponds to a single instruction, and executing the multi-instruction sequence by executing the single instruction.
申请公布号 US2017046163(A1) 申请公布日期 2017.02.16
申请号 US201514868660 申请日期 2015.09.29
申请人 International Business Machines Corporation 发明人 FRAZIER Giles R.;GSCHWIND Michael Karl
分类号 G06F9/38;G06F12/08 主分类号 G06F9/38
代理机构 代理人
主权项 1. A method of executing processor instructions, comprising: retrieving a multi-instruction sequence from memory for execution by a processor; responsive to determining that operations of the multi-instruction sequence is functionally equivalent to operation of a first instruction, replacing the multi-instruction sequence with the first instruction; executing the multi-instruction sequence by executing the first instruction.
地址 Armonk NY US