发明名称 |
OPTICAL MODE CONVERTER HAVING MULTIPLE REGIONS |
摘要 |
A standard-CMOS-process-compatible optical mode converter transitions an optical mode size using a series of adjacent regions having different optical mode sizes. In particular, in a partial-slab-mode region, which is adjacent to an initial rib-optical-waveguide-mode region, a width of a slab portion of the rib-type optical waveguide decreases and a width of a rib portion of the rib-type optical waveguide decreases to a first minimum tip size. Then, in a slab-mode region, which is adjacent to the partial-slab-mode region, the width of the slab portion decreases to a second minimum tip size. In addition, a dielectric layer is disposed over the slab portion, the rib portion and the BOX layer in the partial-slab-mode region, the slab portion and the BOX layer in the slab-mode region, and the BOX layer in a released-mode region that is adjacent to the slab-mode region and that does not include the semiconductor layer. |
申请公布号 |
US2017045686(A1) |
申请公布日期 |
2017.02.16 |
申请号 |
US201514823954 |
申请日期 |
2015.08.11 |
申请人 |
ORACLE INTERNATIONAL CORPORATION |
发明人 |
Lee Jin-Hyoung;Shubin Ivan;Zheng Xuezhe;Krishnamoorthy Ashok V. |
分类号 |
G02B6/14;G02B6/122 |
主分类号 |
G02B6/14 |
代理机构 |
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代理人 |
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主权项 |
1. An integrated circuit, comprising:
a substrate; a buried-oxide (BOX) layer disposed on the substrate; and a semiconductor layer disposed on the BOX layer, wherein, in a rib-optical-waveguide-mode region, an optical waveguide is defined by a slab portion in the semiconductor layer having a constant width along a direction transverse to a symmetry axis of the optical waveguide and a rib portion in the semiconductor layer having a constant width also along the direction transverse to the symmetry axis; and wherein the integrated circuit includes an optical mode converter that includes:
a partial-slab-mode region, adjacent to the rib-optical-waveguide-mode region, in which the width of the slab portion decreases and the width of the rib portion decreases to a first minimum tip size;a slab-mode region, adjacent to the partial-slab-mode region and that excludes the rib portion, in which the width of the slab portion decreases to a second minimum tip size; anda dielectric layer disposed on the substrate, wherein the dielectric layer is disposed over the slab portion, the rib portion and the BOX layer in the partial-slab-mode region, the slab portion and the BOX layer in the slab-mode region, and the BOX layer in a released-mode region adjacent to the slab-mode region and that excludes the semiconductor layer. |
地址 |
Redwood City CA US |