VIRTUAL ACCESS OF INPUT/OUTPUT (I/O) FOR TEST VIA AN ON-CHIP STAR NETWORK

摘要

One embodiment of the present invention sets forth an integrated circuit that includes multiple input/output (I/O) pad groups. Each I/O pad group includes an on-chip star network, multiple I/O pads, multiple test multiplexers, a digital-to-analog converter (DAC), and a wide-range comparator. Each test multiplexer is configured to couple a different I/O pad to the on-chip star network. The DAC is configured to supply at least one of a source current, a sink current, and a first reference voltage to the on-chip star network. The wide-range comparator is configured to compare a voltage present on a first I/O pad included in the plurality of I/O pads with a second reference voltage. Advantageously, IO leakage and DC parametric testing may be performed on integrated circuits with high I/O pad counts using an ATE system with a significantly lower quantity of ATE test channels relative to prior approaches.

主权项

1. An integrated circuit, comprising:
a plurality of input/output (I/O) pad groups, wherein each I/O pad group comprises:
an on-chip star network;a plurality of I/O pads;a plurality of test multiplexers, wherein each test multiplexer is configured to couple a different I/O pad to the on-chip star network;a digital-to-analog converter (DAC) configured to supply at least one of a source current, a sink current, and a first reference voltage to the on-chip star network; anda wide-range comparator configured to compare a voltage present on a first I/O pad included in the plurality of I/O pads with a second reference voltage.