METHOD FOR BRANCH PREDICTION

摘要

The invention relates to a method for predicting branch instructions in a processor and a processor configured for this method. The processor includes an execution unit, an instruction fetch unit and a branch prediction unit. The execution unit is configured for executing machine instructions of a binary computer program. The branch prediction unit is configured for predicting the behavior of branch instructions executed by the execution unit. The instruction fetch unit is configured for fetching and pipelining instructions to be executed by the execution unit.

主权项

1. A computer-implemented method for predicting branch instructions in a processor, the method comprising:
processing a branch instruction of a binary computer program controlling a loop by an execution unit, the branch instruction being fetched by an instruction fetch unit and comprising a counter which is decremented or incremented when the branch instruction is completed and a reference value for a total number of iterations of the loop to be executed by the execution unit; determining a number of remaining iterations for the loop by the execution unit from the counter and the reference value, for the processed branch instruction; sending the number of remaining iterations of the loop from the execution unit to a branch prediction unit when the branch instruction is completely executed; predicting, by the branch prediction unit, future behavior of the processed branch instruction on the basis of the number of remaining iterations of the loop; and fetching and pipelining future instructions of the binary computer program by the instruction fetch unit depending on the prediction of the future behavior of the branch instruction.