发明名称 SINGLE-POLE-SINGLE-THROW (SPST) SWITCH AND ITS DERIVATIVE SINGLE-POLE-DOUBLE-THROW (SPDT) AND SINGLE-POLE-MULTIPLE-THROW (SPMT) SWITCHES
摘要 A Single-Pole-Single-Throw (SPST) switch for RF application is disclosed that can include a semiconductor MOSFET transistor T, wherein its drain terminal can be connected to a resistor R3 and capacitor C2. It can have a source terminal connected to a resistor R1 and capacitor C1, a gate terminal connected to resistor R2, a body connected by resistor R4 to GND, and the body can be connected to the anode of a diode DE The Cathode of diode D1 can be connected to a power supply Vdd through a resistor R6. The Cathode of diode D1 can also be connected to the cathode of another diode D2. The anode of D2 can be connected to GND through resistor R5. Capacitor C1 can be connected to an I/O port P1, and capacitor C2 can be connected to an I/O port P2. Inductor L1 can connect to ports P1 and P2, while inductor L2 can connect the source terminal and drain terminal of MOSPET T. This disclosure also provides a Single-Pole-Double-Throw (SPDT) switch and Single-Pole-Multiple-Throw (SPMT) switch based on the proposed SPST concept. The SPST disclosed can offer higher isolation and higher linearity to the transmit (TX) arm of the Radio-Frequency Front-End-Module (RF FEM), while maintaining relatively good performance in the receive (RX) arm of the RF FEM.
申请公布号 US2017040996(A1) 申请公布日期 2017.02.09
申请号 US201615230366 申请日期 2016.08.05
申请人 Zhao Huan 发明人 Zhao Huan
分类号 H03K17/687 主分类号 H03K17/687
代理机构 代理人
主权项 1. A Single-Pole-Single-Throw (SPST) Switch comprising: a semiconductor MOSFET transistor T with a drain terminal connected to a resistor R3 and a capacitor C2; a source terminal connected to a resistor R1 and a capacitor C1; a gate terminal connected to a resistor R2; a body connected to a resistor R4 to a GND and connected to a diode D1 through an anode of diode D1; wherein a cathode of the diode D1 is connected to a power supply VDD through a resistor R6 while connecting to a cathode of a diode D2; wherein an anode of the diode D2 is connected to the GND through a resistor R5; wherein the capacitor C1 is connected to an I/O port P1, and the capacitor C2 is connected to an I/O port P2.
地址 Irvine CA US