发明名称 3D semiconductor device and structure
摘要 A semiconductor device, including: a first layer including monocrystalline material and first transistors, the first transistors overlaid by a first isolation layer; a second layer including second transistors and overlaying the first isolation layer, the second transistors including a monocrystalline material; where the second layer includes at least one through layer via to provide connection between at least one of the second transistors and at least one of the first transistors, where the at least one through layer via has a diameter of less than 200 nm; a first set of external connections underlying the first layer to connect the device to external devices; and a second set of external connections overlying the second layer to connect the device to external devices.
申请公布号 US9564432(B2) 申请公布日期 2017.02.07
申请号 US201414509288 申请日期 2014.10.08
申请人 MONOLITHIC 3D INC. 发明人 Or-Bach Zvi;Sekar Deepak C.;Cronquist Brian;Beinglass Israel;de Jong Jan Lodewijk
分类号 H01L27/088;G11C17/14;H01L21/762;H01L21/822;H01L21/84;H01L23/525;H01L23/544;H01L25/065;H01L25/18;H01L27/02;H01L27/06;H01L27/092;H01L27/105;H01L27/108;H01L27/11;H01L27/112;H01L27/118;H03K17/687;H03K19/0948;H03K19/177;H01L21/8226;H01L23/48;H01L23/528;H01L23/532;H01L23/00 主分类号 H01L27/088
代理机构 Tran & Associates 代理人 Tran & Associates
主权项 1. A semiconductor device, comprising: a first layer comprising monocrystalline material and first transistors, said first transistors overlaid by a first isolation layer; a second layer comprising second transistors and overlaying said first isolation layer, said second transistors comprising a monocrystalline material; wherein said second layer comprises at least one through layer via to provide connection between at least one of said second transistors and at least one of said first transistors,wherein said at least one through layer via has a diameter of less than 200 nm; a first set of external connections underlying said first layer to connect said device to external devices; and a second set of external connections overlying said second layer to connect said device to external devices.
地址 San Jose CA US