发明名称 |
MOSFET WITH ULTRA LOW DRAIN LEAKAGE |
摘要 |
A semiconductor device includes a monocrystalline substrate configured to form a channel region between two recesses in the substrate. A gate conductor is formed on a passivation layer over the channel region. Dielectric pads are formed in a bottom of the recesses and configured to prevent leakage to the substrate. Source and drain regions are formed in the recesses on the dielectric pads from a deposited non-crystalline n-type material with the source and drain regions making contact with the channel region. |
申请公布号 |
US2017033203(A1) |
申请公布日期 |
2017.02.02 |
申请号 |
US201615287854 |
申请日期 |
2016.10.07 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
de Souza Joel P.;Fogel Keith E.;Kim Jeehwan;Sadana Devendra K. |
分类号 |
H01L29/66;H01L29/08;H01L21/02 |
主分类号 |
H01L29/66 |
代理机构 |
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代理人 |
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主权项 |
1. A method for forming a transistor, comprising:
forming a passivation layer on a monocrystalline substrate; forming a gate conductor over a channel region of the substrate; etching recesses in the substrate through the gate dielectric, the recesses extending below a portion of the passivation layer in undercut regions; depositing a dielectric material that forms on the passivation layer, forms a gate cap material and forms dielectric pads in a bottom of the recesses; and forming source and drain regions in the recesses on the dielectric pads from an n-type material with the source and drain regions making contact with the channel region. |
地址 |
Armonk NY US |