发明名称 AGE BASED FAST INSTRUCTION ISSUE
摘要 In an approach for selecting and issuing an oldest ready instruction in an issue queue, one or more processors receive one or more instructions in an issue queue. Ready to execute instructions are identified. An age of the instructions are represented in a first age array. One or more subsets of the instructions are generated for subset age arrays that each hold an age of the instructions in a subset. A major signal is generated that identifies an oldest ready instruction in the first age array and a subset signal is simultaneously generated that identifies an oldest ready instruction in each subset age array. A candidate instruction is selected with each subset signal that is represented in the subset age array of the subset signal, wherein a candidate instruction is an oldest ready instruction in the subset age array. A candidate instruction is selected with the major signal and issued.
申请公布号 US2017031686(A1) 申请公布日期 2017.02.02
申请号 US201615145835 申请日期 2016.05.04
申请人 International Business Machines Corporation 发明人 Brownscheidle Jeffrey C.;Chadha Sundeep;Delaney Maureen A.;Nguyen Dung Q.
分类号 G06F9/38 主分类号 G06F9/38
代理机构 代理人
主权项 1. A method for selecting and issuing an oldest ready instruction in an issue queue, the method comprising: generating, by one or more processors, one or more subsets of one or more instructions in an issue queue that are associated in one-to-one correspondence with one or more subset age arrays, wherein a subset age array holds a representation of an age of each of the one or more instructions in an associated subset that is relative to each of the one or more instructions in the associated subset; generating simultaneously, by one or more processors, i) a major signal that identifies an oldest ready instruction with an age represented in a first age array, and ii) an associated subset signal that identifies an oldest ready instruction with an age that is represented in the associated subset age array with each subset age array; and selecting, by one or more processors, a candidate instruction with the major signal and issuing the candidate instruction.
地址 Armonk NY US