发明名称 データ処理装置、マイクロコントローラ、及び半導体装置
摘要 In order to perform easily power cutoff of a device configuring a data processing system and to improve the power reduction effect at standby, the data processing system is configured with a microcontroller, a memory IC including a nonvolatile RAM array, and a power supply unit capable of controlling the power supply to the microcontroller and the memory IC, separately. When a control signal to control read and write of data to the nonvolatile RAM array is at a high level, the memory IC is enabled read and write of data to the nonvolatile RAM array. When the control signal is at a low level, the memory IC is disenabled read and write of data to the nonvolatile RAM array. The microcontroller sets the control signal at a low level, when the memory IC is shifted to a standby state by the power supply unit.
申请公布号 JP6072661(B2) 申请公布日期 2017.02.01
申请号 JP20130204650 申请日期 2013.09.30
申请人 ルネサスエレクトロニクス株式会社 发明人 原口 大;林 勇;河合 浩行
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
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