| 发明名称 |
DOUBLE SAMPLING STATE RETENTION FLIP-FLOP |
| 摘要 |
Embodiments of a device and method are disclosed. In an embodiment, a flip-flop circuit is disclosed. The flip-flop circuit includes a master latch, a slave latch connected to the master latch, and a dual-function circuit connected between the master latch and the slave latch and configured to perform state retention and double sampling. |
| 申请公布号 |
EP3125430(A2) |
申请公布日期 |
2017.02.01 |
| 申请号 |
EP20160175289 |
申请日期 |
2016.06.20 |
| 申请人 |
NXP B.V. |
发明人 |
ECHEVERRI ESCOBAR, Juan Diego;PINEDA DE GYVEZ, Jose de Jesus;FABRIE, Sebastien Antonius Josephus |
| 分类号 |
H03K3/012;H03K3/037;H03K19/00 |
主分类号 |
H03K3/012 |
| 代理机构 |
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