Trap rich layer with through-silicon-vias in semiconductor devices

摘要

An integrated circuit chip is formed with a circuit layer, a trap rich layer and through-semiconductor-vias. The trap rich layer is formed above the circuit layer. The through-semiconductor-vias are also formed above the circuit layer. In some embodiments, the circuit layer is included in a wafer, and the trap rich layer and through-semiconductor-vias are included in another wafer. The two wafers are bonded together after formation of the trap rich layer and through-semiconductor-vias. Additionally, in some embodiments, yet another wafer may also be bonded to the wafer that includes the trap rich layer and through-semiconductor-vias. Furthermore, in some embodiments, another circuit layer may be formed in the wafer that includes the trap rich layer and through-semiconductor-vias.

主权项

1. A method of forming an integrated circuit chip comprising:
providing a semiconductor wafer with an active circuit layer; forming a through-semiconductor-via in said semiconductor wafer; and forming a first trap rich layer of said semiconductor wafer; wherein said through-semiconductor-via passes through said first trap rich layer and a second trap rich layer that is separated from the first trap rich layer by a semiconductor substrate layer, further wherein a third trap rich layer isolates the through-semiconductor-via from the semiconductor substrate layer.