发明名称 |
Semiconductor device |
摘要 |
A semiconductor device includes a first electrode, a first insulating layer having a first opening reaching the first electrode and having a ring-shaped first side wall exposed to the first opening, an oxide semiconductor layer on the first side wall, the oxide semiconductor layer being connected with the first electrode, a gate insulating layer on the oxide semiconductor layer, the oxide semiconductor layer being between the first side wall and the gate insulating layer, a gate electrode facing the oxide semiconductor layer on the first side wall, the gate insulating layer being between the oxide semiconductor layer and the gate electrode, and a second electrode above the first insulating layer, the second electrode being connected with the oxide semiconductor layer. |
申请公布号 |
US9559214(B2) |
申请公布日期 |
2017.01.31 |
申请号 |
US201514950777 |
申请日期 |
2015.11.24 |
申请人 |
Japan Display Inc. |
发明人 |
Sasaki Toshinari |
分类号 |
H01L29/786;H01L29/417;H01L29/423;H01L29/66;H01L27/12 |
主分类号 |
H01L29/786 |
代理机构 |
TYPHA IP LLC |
代理人 |
TYPHA IP LLC |
主权项 |
1. A semiconductor device, comprising:
a first electrode; a first insulating layer having a first opening reaching the first electrode and having a ring-shaped first side wall exposed to the first opening; an oxide semiconductor layer on the first side wall, the oxide semiconductor layer being connected with the first electrode; a gate insulating layer on the oxide semiconductor layer, the oxide semiconductor layer being between the first side wall and the gate insulating layer; a gate electrode facing the oxide semiconductor layer on the first side wall, the gate insulating layer being between the oxide semiconductor layer and the gate electrode; and a second electrode above the first insulating layer, the second electrode being connected with the oxide semiconductor layer; further comprising: a second insulating layer above the first electrode, the first insulating layer, the oxide semiconductor layer and the gate insulating layer; a fourth electrode connected with the first electrode; and a fifth electrode connected with the gate electrode; wherein: the fourth electrode is connected with the first electrode via a second opening in the second insulating layer; the second electrode is connected with the oxide semiconductor layer via a third opening in the second insulating layer; and the fifth electrode is connected with the gate electrode via a fourth opening in the second insulating layer. |
地址 |
Tokyo JP |