| 发明名称 |
Select Gates with Central Open Areas |
| 摘要 |
A NAND flash memory array includes a select line having a first edge region containing a first portion of floating gate material and a second edge region containing a second portion of floating gate material, and having a central region between the first edge region and the second edge region where no floating gate material is present. |
| 申请公布号 |
US2017025425(A1) |
申请公布日期 |
2017.01.26 |
| 申请号 |
US201514808475 |
申请日期 |
2015.07.24 |
| 申请人 |
SanDisk Technologies, Inc. |
发明人 |
Yaegashi Masahiro;Funayama Kota;Kawamura Takeshi;Iwata Dai |
| 分类号 |
H01L27/115;H01L29/40;H01L21/265;H01L23/528;H01L29/788;H01L29/167;H01L21/768;H01L21/02;H01L29/49;H01L21/28 |
主分类号 |
H01L27/115 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A NAND flash memory array comprising:
a plurality of word lines extending in a first direction over a substrate surface; a plurality of select lines extending in the first direction over the substrate surface; and an individual select line having a first edge region containing a first portion of floating gate material and a second edge region containing a second portion of floating gate material, and having a central region between the first edge region and the second edge region where no floating gate material is present. |
| 地址 |
Plano TX US |
