Impedance calibration circuit, and semiconductor memory and memory system using the same

摘要

An embodiment may include a first replica driver group configured for replicating an output driver of a physical area. A second replica driver group configured for replicating an output driver of a test electrode area for direct access of a memory, and an impedance calibration unit configured to independently perform an impedance matching operation of the first replica driver group and the second replica driver group.

主权项

1. An impedance calibration circuit comprising:
a first replica driver group configured for replicating an output driver of a test electrode area for accessing a memory directly; a second replica driver group configured for replicating an output driver of a physical area; and an impedance calibration unit configured to perform an impedance matching operation for the test electrode area by activating only the first replica driver group, and perform an impedance matching operation for the physical area by activating only the second replica driver group, wherein the impedance calibration unit is configured to selectively supply a power voltage to only the first replica driver, and selectively supply the power voltage to only the second replica driver.