发明名称 Method of reducing the heights of source-drain sidewall spacers of FinFETs through etching and the FinFETs thereof
摘要 An integrated circuit device includes a semiconductor substrate, insulation regions extending into the semiconductor substrate, and a semiconductor fin protruding above the insulation regions. The insulation regions have a first portion and a second portion, with the first portion and the second portion on opposite sides of the semiconductor fin. The semiconductor fin has a first height. The integrated circuit device further includes a gate stack over a middle portion of the semiconductor fin, and a fin spacer on a sidewall of an end portion of the semiconductor fin. The fin spacer has a second height. The first height is greater than about two times the second height.
申请公布号 US9548367(B2) 申请公布日期 2017.01.17
申请号 US201514961048 申请日期 2015.12.07
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Lee Jam-Wem;Tsai Tsung-Che;Chang Yi-Feng
分类号 H01L31/0392;H01L29/417;H01L29/78;H01L29/66;H01L29/06;H01L29/49 主分类号 H01L31/0392
代理机构 Slater Matsil, LLP 代理人 Slater Matsil, LLP
主权项 1. An integrated circuit device comprising: a semiconductor substrate; insulation regions extending into the semiconductor substrate; a semiconductor fin protruding above the insulation regions, wherein the insulation regions comprise a first portion and a second portion, with the first portion and the second portion on opposite sides of the semiconductor fin, and wherein the semiconductor fin has a first height; a gate stack over a middle portion of the semiconductor fin; and a first fin spacer on a sidewall of an end portion of the semiconductor fin, wherein the first fin spacer has a second height, and wherein the first height is greater than about two times the second height.
地址 Hsin-Chu TW