发明名称 |
CACHE DECICE AND MEMORY SYSTEM |
摘要 |
A virtual memory management apparatus of an embodiment is embedded in a computing machine 80 and is provided with an application program 21, an operating system 22, a volatile memory 11, and a nonvolatile memory 12. The volatile memory 11 is provided with a plurality of clean pages. The nonvolatile memory 12 is provided with a plurality of dirty pages and a page table memory unit 51. The operating system 22 is provided with a virtual memory management unit 23 which includes a page transfer unit 25. |
申请公布号 |
US2017010812(A1) |
申请公布日期 |
2017.01.12 |
申请号 |
US201615270197 |
申请日期 |
2016.09.20 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
Yoshida Hideki;Kanai Tatsunori;Tarui Masaya;Yamada Yutaka |
分类号 |
G06F3/06;G11C7/10;G06F12/0811 |
主分类号 |
G06F3/06 |
代理机构 |
|
代理人 |
|
主权项 |
1. A storage device comprising:
a first memory comprising:
a first memory area configured to be written clean page data which is stored in a second memory, anda second memory area configured to be written dirty page data which is not stored in the second memory, the second memory area comprising nonvolatile memory cells and further configured to store management information which is used for management of data location; a second memory having a lower access speed than the first memory; and a controller configured to
transfer the dirty page data from the second memory area to the second memory, andclear a space of the second memory area in which the dirty page data was stored by transferring the dirty page data to the first memory area. |
地址 |
Tokyo JP |