发明名称 半導体集積回路装置
摘要 PROBLEM TO BE SOLVED: To reduce an area of a semiconductor integrated circuit device comprising an A/D converter which performs conversion processing on an inputted analog signal into a digital signal by performing digital correction processing.SOLUTION: A semiconductor integrated circuit device comprises first and second A/D converters. In a first mode, a first test signal is inputted in common to the first and second A/D converters, and a first correction coefficient for the first A/D converter and a second correction coefficient for the second A/D converter are calculated. In a second mode, the first A/D converter performs first digital correction processing using the first correction coefficient, thereby performing A/D conversion processing on a first analog signal into a first digital signal, and the second A/D converter performs second digital correction processing using the second correction coefficient, thereby performing A/D conversion processing on a second analog signal into a second digital signal.
申请公布号 JP6059770(B2) 申请公布日期 2017.01.11
申请号 JP20150139463 申请日期 2015.07.13
申请人 ルネサスエレクトロニクス株式会社 发明人 松浦 達治;中根 秀夫;笠原 真澄;氏家 隆一;木村 圭助;大島 俊
分类号 H03M1/10;H03M1/12 主分类号 H03M1/10
代理机构 代理人
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