发明名称 |
LOW END PARASITIC CAPACITANCE FINFET |
摘要 |
Embodiments of the present invention provide methods for fabricating a semiconductor device. One method may include providing a semiconductor substrate with fins etched into the semiconductor substrate; forming a gate structure and depositing an insulating material around the gate structure; selectively etching an active device area; forming a set of spacers on the sides of the gate structure; growing a doped source and drain region; depositing an insulator over an upper surface of a deposited etch stop layer; and depositing a metal into a contact opening to form one or more contacts. |
申请公布号 |
US2017005092(A1) |
申请公布日期 |
2017.01.05 |
申请号 |
US201615265905 |
申请日期 |
2016.09.15 |
申请人 |
International Business Machines Corporation |
发明人 |
Leobandung Effendi |
分类号 |
H01L27/088;H01L21/762;H01L21/8234;H01L29/49;H01L29/78;H01L21/311;H01L29/51;H01L21/768 |
主分类号 |
H01L27/088 |
代理机构 |
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代理人 |
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主权项 |
1. A method for fabricating a semiconductor device comprising:
providing a semiconductor substrate comprising a plurality of fins etched in the semiconductor substrate; forming a set of gate structures; depositing a first insulating material between the set of gate structures; selectively etching an active device area; depositing an oxide material over a top surface of the active device area; removing the first insulating material selective to the plurality of fins; forming a set of spacers adjacent to the set of gate structures; growing a doped source and drain region adjacent to the plurality of fins; depositing an etch stop layer over an upper surface of the deposited oxide material; depositing a second insulating material over an upper surface of the deposited etch stop layer; and depositing a metal within a contact opening to form a plurality of contacts. |
地址 |
Armonk CA US |