| 发明名称 |
SEMICONDUCTOR MEMORY DEVICE HAVING CLOCK GENERATION SCHEME BASED ON COMMAND |
| 摘要 |
A semiconductor memory device includes a command decoder configured to generate an auto-sync signal in response to a command for writing data at a memory cell or reading data from a memory cell, and an internal data clock generating circuit configured to phase synchronize a second clock, having a clock frequency higher than a clock frequency of a first clock, with the first clock in response to the auto-sync signal. |
| 申请公布号 |
US2017004869(A1) |
申请公布日期 |
2017.01.05 |
| 申请号 |
US201615081071 |
申请日期 |
2016.03.25 |
| 申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SHIN SEUNGJUN;DOO SU YEON;OH TAEYOUNG |
| 分类号 |
G11C11/4076;G11C11/4096;G11C29/52;G11C11/408 |
主分类号 |
G11C11/4076 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor memory device comprising:
a command decoder configured to generate an auto-sync signal in response to a command for writing data to a memory cell or reading data from a memory cell; and an internal data clock generating circuit configured to adjust phase of a second clock to synchronize with a first clock in response to the auto-sync signal, wherein a frequency of the second clock is higher than a frequency of the first clock. |
| 地址 |
SUWON-SI KR |
