SYNTHETIC TEST CIRCUIT FOR VALVE PERFORMANCE TEST OF HVDC

摘要

Disclosed is a synthetic test circuit for a valve performance test of HVDC. The synthetic test circuit comprises a resonance circuit configured to comprise a first test valve to test an operation of an inverter mode and a second test valve to test an operation of a rectifier mode. The synthetic test circuit comprises a power supply (P/S) configured to provide the resonance circuit with an operating voltage. The synthetic test circuit comprises a DC/DC converter configured to bypass a DC offset current of the resonance circuit. The first test valve is an inverter unit (INV), which has a positive DC current offset. Further, the second test valve is a rectifier unit (REC), which has a negative DC current offset.