Semiconductor structure with a spacer layer

摘要

A multi-layer semiconductor structure is disclosed for use in III-Nitride semiconductor devices, including a channel layer, a band-offset layer having a wider bandgap than the channel layer, a spacer layer having a narrower bandgap than the band-offset layer, and a cap layer comprising at least two sublayers. Each sublayer is selectively etchable with respect to sublayers immediately below and above, each sublayer comprises a III-N material AlxInyGazN in which 0≦x≦1, 0≦y≦1, and 0≦z≦1, at least one sublayer has a non-zero Ga content, and a sublayer immediately above the spacer layer has a wider bandgap than the spacer layer. Also described are methods for fabricating such semiconductor structures, with gate and/or ohmic recesses formed by selectively removing adjacent layers or sublayers. The performance of resulting devices is improved, while providing design flexibility to reduce production cost and circuit footprint.

主权项

1. A method for making a III-Nitride (III-N) semiconductor device, comprising:
patterning a semiconductor structure to expose a gate region of a transistor, wherein the semiconductor structure comprises:
a channel layer comprising a first III-N material for providing electrical conduction;a band-offset layer disposed on the channel layer, the band-offset layer comprising a second III-N material, and having a wider bandgap than the channel layer;a spacer layer disposed on the band-offset layer, the spacer layer comprising a third III-N material, and having a narrower bandgap than the band-offset layer;a cap layer disposed on the spacer layer, the cap layer comprising at least two sublayers, wherein each sublayer is selectively etchable with respect to sublayers immediately below and above, wherein each sublayer comprises a III-N material AlxInyGazN in which 0≦x≦1, 0≦Y≦1 and 0≦Z≦1, wherein at least one of the sublayers has a non-zero Ga content with 0