Semiconductor integrated circuit capable of precisely adjusting delay amount of strobe signal

摘要

An interface circuit provided in a semiconductor device supplies an operation clock to an external memory device based on a clock signal and receives a data signal and a strobe signal from the external memory device. The interface circuit includes a delay circuit delaying the received strobe signal. The delay circuit includes a first adjustment circuit and a second adjustment circuit connected in series with the first adjustment circuit. The first adjustment circuit is capable of adjusting a delay amount of the strobe signal in a plurality of steps in accordance with the set frequency of the clock signal. The second adjustment circuit is capable of adjusting the delay amount of the strobe signal with a higher precision than the first adjustment circuit.

主权项

1. A semiconductor device comprising:
a clock generator generating a clock signal having a set frequency; and an interface circuit supplying an operation clock to an external memory device based on said clock signal and receiving a data signal and a strobe signal from said memory device, said interface circuit including:
a delay circuit delaying said received strobe signal; anda data detection circuit sampling said data signal at a timing of an edge of said strobe signal having been delayed by said delay circuit, and said delay circuit including:
a first adjustment circuit capable of adjusting a delay amount of said strobe signal in a plurality of steps in accordance with the set frequency of said clock signal; anda second adjustment circuit connected in series with said first adjustment circuit and capable of adjusting the delay amount of said strobe signal with a higher precision than said first adjustment circuit, wherein said first adjustment circuit includes:
a plurality of delay elements connected in series to each other; anda selection circuit changing, in accordance with a given delay amount setting value, the number of delay elements through which said strobe signal passes before being output from said first adjustment circuit, said semiconductor device further comprises:
a central processing unit setting the frequency of said clock signal; anda control circuit receiving information regarding the set frequency of said clock signal and outputting said delay amount setting value to said selection circuit based on a predetermined correlation between said set frequency and said delay amount setting value, and said correlation is determined so that the number of delay elements through which said strobe signal passes before being output from said first adjustment circuit is larger as said set frequency is lower.