| 摘要 |
[Problem] To provide an I/O circuit which is high speed and has low power consumption. [Solution] A differential-type I/O circuit is provided with: a driver 10 which outputs complementary signals corresponding to an input signal; a pair of transmission lines 20 which comprise a first line 21 and a second line 22, and which transmit the complementary signals outputted from the driver; and a receiver 30 into which the complementary signals transmitted through the pair of transmission lines are inputted. The driver includes: a positive-phase CMOS inverter 11 which supplies, to the first line, a positive-phase signal having the same phase as the input signal; and a reverse-phase CMOS inverter 12 which supplies, to the second line, a reverse-phase signal having the reverse phase to the input signal. The positive-phase CMOS inverter and the reverse-phase CMOS inverter are configured including nMOS transistors and pMOS transistors. The on resistance values of the nMOS transistors and the pMOS transistors respectively correspond to a specified value which is ½ of the characteristic impedance of the pair of transmission lines, or are matched within the range of ±30% of the specified value. |
