发明名称 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
摘要 A semiconductor package and a manufacturing method thereof are provided. The package element has a first insulating layer, and a plurality of holes are disposed on the first surface of the first insulating layer. Besides, a plurality of package traces are embedded in the insulating layer and connected to the other end of the holes. The holes function as a positioning setting for connecting the solder balls to the package traces, such that the signal of the semiconductor chip is connected to the package trace via conductor of the chip, and further transmitted externally via solder ball. The elastic modulus of the material of the first insulating layer is preferably larger than 1.0 GPa.
申请公布号 US2016329306(A1) 申请公布日期 2016.11.10
申请号 US201615213355 申请日期 2016.07.18
申请人 ADVANPACK SOLUTIONS PTE LTD. 发明人 CHEW Hwee-Seng Jimmy;ONG Chee-Kian;ABD. RAZAK Bin Chichik
分类号 H01L25/065;H01L21/56;H01L23/498;H01L23/495;H01L21/683;H01L21/48 主分类号 H01L25/065
代理机构 代理人
主权项 1. A semiconductor package, comprising: a package trace layout comprising a plurality of package traces; an insulating layer having a first surface and a second surface opposite the first surface, wherein the plurality of package traces are embedded in the insulating layer between the first surface and the second surface, the package trace layout is entirely exposed on the first surface of the insulating layer; wherein the package trace layout further comprises at least two different patterns of conductive dots on the first surface of the insulating layer that is used to connect to semiconductor chips of different sizes.
地址 Singapore SG