发明名称 |
MAGNETIC RANDOM ACCESS MEMORY WITH DYNAMIC RANDOM ACCESS MEMORY (DRAM)-LIKE INTERFACE |
摘要 |
A memory device includes a magnetic memory unit for storing a burst of data during a burst write operation. Each burst of data includes sequential data units with each data unit being received at a clock cycle, and written during the burst write operation, wherein the burst write operation is performed during multiple clock cycles. Further, the memory device includes a mask register coupled to the magnetic memory unit that generates a write mask during the burst write operation to inhibit or enable data units of write data. Furthermore, the memory device allows a next burst write operation to begin while receiving data units of the burst of data to be written or providing read data. |
申请公布号 |
US2016328152(A1) |
申请公布日期 |
2016.11.10 |
申请号 |
US201615213278 |
申请日期 |
2016.07.18 |
申请人 |
Avalanche Technology, Inc. |
发明人 |
Nemazie Siamack |
分类号 |
G06F3/06 |
主分类号 |
G06F3/06 |
代理机构 |
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代理人 |
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主权项 |
1. A memory device configured to emulate dynamic random access memory (DRAM) comprising:
a memory array including a plurality of memory cells organized into rows and columns, at least one row of memory cells comprising one or more pages that store data during a burst write operation, said data including sequential data units that are written to a page; a mask register coupled to said memory array and configured to generate write masks for said burst write operation; a control circuit operable to:
initiate said burst write operation that writes said data to said memory array, said burst write operation spanning multiple clock cycles; andafter receiving one or more data units of said data by said memory array, allow a subsequent burst write or read command to begin before completion of said burst write operation in progress; an encoder operable to encode said data to be written to said memory array; and a decoder coupled to said memory array and operable to check and correct said data previously encoded by said encoder and saved in said memory array. |
地址 |
Fremont CA US |