发明名称 エラー応答回路、半導体集積回路及びデータ転送制御方法
摘要 In an error response circuit an analysis circuit unit analyzes a command transmitted from a first circuit section to a second circuit section, and detects a status of data transfer between the first circuit section and the second circuit section. A response circuit unit generates an error signal in accordance with the detected status of the data transfer in response to the second circuit section changing from a first power consumption state to a second power consumption state in which power consumption is lower than power consumption in the first power consumption state. A switching circuit unit transmits the error signal to the first circuit section in place of a response signal that is responsive to the command and transmitted from the second circuit section to the first circuit section.
申请公布号 JP6015054(B2) 申请公布日期 2016.10.26
申请号 JP20120072059 申请日期 2012.03.27
申请人 株式会社ソシオネクスト 发明人 齊藤 なつみ;仁茂田 永一
分类号 G06F3/00 主分类号 G06F3/00
代理机构 代理人
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