发明名称 ストレージシステム及びキャッシュコントロール方法
摘要 A cache memory comprises a cache controller and a nonvolatile semiconductor memory as a storage medium. The nonvolatile semiconductor memory comprises multiple blocks, which are data erase units, and each block comprises multiple pages, which are data write and read units. The cache controller receives data and attribute information of the data, and, based on the received attribute information and attribute information of the data stored in the multiple blocks, selects a storage-destination block for storing the received data, and writes the received data to a page inside the selected storage-destination block.
申请公布号 JP6017065(B2) 申请公布日期 2016.10.26
申请号 JP20150551259 申请日期 2013.01.31
申请人 株式会社日立製作所 发明人 小川 純司;鈴木 彬史
分类号 G06F3/06;G06F3/08;G06F12/08 主分类号 G06F3/06
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