发明名称 |
METHOD AND APPARATUS FOR OPTIMIZED MEMORY TEST STATUS DETECTION AND DEBUG |
摘要 |
Embodiments contained in the disclosure provide a method for memory built-in self-testing (MBIST). The method begins when a testing program is loaded, which may be from an MBIST controller. Once the testing program is loaded MBIST testing begins. During testing, memory failures are determined and written to a failure indicator register. The writing to the failure indicator register occurs in parallel with the ongoing MBIST testing. An apparatus is also provided. The apparatus includes a memory data read/write block, a memory register, a memory addressor, and a memory read/write controller. The apparatus communicates with the memories under test through a memory address and data bus. |
申请公布号 |
US2016293272(A1) |
申请公布日期 |
2016.10.06 |
申请号 |
US201514676501 |
申请日期 |
2015.04.01 |
申请人 |
QUALCOMM Incorporated |
发明人 |
Anand Ashutosh;Bhat Shankarnarayan;Sudhakaran Nikhil;Raghuraman Praveen;Bhushan Singh Nishi;Bhat Anand;Kothiala Abhinav;Muchini Sanjay;Balachandar Arun;Bhat Devadatta |
分类号 |
G11C29/38;G11C29/44;G11C29/36 |
主分类号 |
G11C29/38 |
代理机构 |
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代理人 |
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主权项 |
1. A method of memory built-in self-testing (MBIST), comprising:
loading a testing program; testing memories using the testing program; determining if any memory is failing; and writing to a failure indicator register in parallel with ongoing testing if any memory is failing. |
地址 |
San Diego CA US |