| 摘要 |
A low-pass filter operation circuit 113 constitutes a serial interface circuit, which enables communication conforming to the serial bus standard including IEEE 1394 and USB 3.0, together with a timer register 114, a packet receiving circuit 111, and a packet transmitting circuit 112. Further, the low-pass filter operation circuit 113 performs a correction process of gradually increasing or decreasing an internal timer value counted by the timer register 114 by a unit count value of the timer register 114, thereby converging the deviation. A timer operation circuit 15 calculates a timer reference value, corresponding to the timing at which synchronization is to be carried out next, common to cameras 1, ..., 1, on the basis of a timer value maintained in the timer register 114, and a frame rate generated by a CPU 14. |
