| 摘要 |
There are numerous types of dividers that have been employed at various frequency ranges. For many very high frequency ranges (i.e., above 30 GHz), dividers in CMOS have been developed. However, many of these designs use multiple stages. Here, however, a single stage divider has been provided that is adapted to operate at very high frequencies (i.e., 120 GHz). To accomplish this, it uses parasitic capacitances in conjunction with inductor(s) to form an LC tanks so as to take advantages of parasitics that normal degrade performance. |
