| 摘要 |
A class of digital signal processor instructions, comprising at least a first instruction type and a second instruction type, is proposed. The class of instructions may be added to the instruction set of a digital signal vector processor and a program instruction is selected from the digital signal processor instruction set. The digital signal processor is adapted to cause execution of a method comprising obtaining a program instruction, selecting a real valued input as one of a first real valued input and a second real valued input (the first and second real valued inputs organized as adjacent elements of a first input vector), performing an arithmetic operation on the selected real valued input to provide a real valued result, and providing a first real valued output and a second real valued output during a first operation cycle (the first and second real valued outputs organized as adjacent elements of a second output vector). The real valued input is selected as the first real valued input if the program instruction is of the first instruction type and as the second real valued input if the program instruction is of the second instruction type. Furthermore (if the program instruction is of one of the first instruction type and the second instruction type), the real valued result is provided as the first real valued output and as the second real valued output, and the second output vector is a real valued second output vector for real-complex multiplication with a complex valued third vector. |
