发明名称 半導体記憶装置およびその制御方法
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device and its control method which can prevent deterioration of a static noise margin to stabilize memory access and in addition can avoid deterioration of a write margin without incurring reduction in an operation speed and increase in power consumption.SOLUTION: A semiconductor memory device, which includes a plurality of columns 0 to m each of which includes a plurality of memory cells MC that are provided between bit lines BL<0>, BLX<0> to BL<m>, BLX<m> and word lines WL, includes: step-up circuits PBST and Cap that step up a first power supply voltage VDD to a higher second power supply voltage VDD+&alpha;; and memory cell power supply voltage control circuits PK0 and PK1 that perform application of the first power supply voltage or second power supply voltage as memory cell power supply voltage MVDD<m> according to whether data writing or data reading is performed.
申请公布号 JP5962185(B2) 申请公布日期 2016.08.03
申请号 JP20120102930 申请日期 2012.04.27
申请人 株式会社ソシオネクスト 发明人 森脇 真一
分类号 G11C11/413 主分类号 G11C11/413
代理机构 代理人
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