发明名称 |
A METHOD AND AN APPARATUS FOR POWER MANAGEMENT IN A COMPUTER SYSTEM |
摘要 |
A method and an apparatus for power management in a computer system have been disclosed. One embodiment of the method includes monitoring transactions over an interconnect coupling a chipset device and a peripheral device in the system, the transactions being transmitted between the peripheral device and the chipset device according to a flow control protocol to allow the chipset device to keep track of the transactions, and causing a processor in the system to exit from a power state if a plurality of coherent transactions pending in a buffer of the chipset device exceeds a first threshold. Other embodiments are described and claimed. |
申请公布号 |
EP1702253(B1) |
申请公布日期 |
2016.06.29 |
申请号 |
EP20040815690 |
申请日期 |
2004.12.23 |
申请人 |
INTEL CORPORATION |
发明人 |
KWA, SEH, W.;SRITANYARATANA, SIRIPONG |
分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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