| 摘要 |
The technology of the present invention pertains to a power source monitoring circuit, a power on reset circuit, and a semiconductor device that enable a steady current to be reduced. The semiconductor device is provided with the following: a level shifter circuit that performs level conversion on a digital signal output from a prescribed block, and outputs the converted digital signal to another block that operates using a power source different from the power source of the prescribed block; and a power source monitoring circuit that controls the operation of the level shifter circuit. The power source monitoring circuit causes the operation of the level shifter circuit to stop on the basis of the state of the power source that supplies power to the prescribed block, and a stand-by control signal for controlling the operation state of the other block. The power source monitoring circuit is configured so that a transistor is disposed on the path of a steady current, and so that in accordance with the stand-by control signal, the steady current does not flow. The technology of the present invention can be applied to a semiconductor device. |
