APPARATUS AND METHOD TO PRECLUDE LOAD REPLAYS DEPENDENT ON WRITE COMBINING MEMORY SPACE ACCESS IN AN OUT-OF-ORDER PROCESSOR

摘要

An apparatus including first and second reservation stations. The first reservation station dispatches a load micro instruction, and indicates on a hold bus if the load micro instruction is a specified load micro instruction directed to retrieve an operand from a prescribed resource other than on-core cache memory. The second reservation station is coupled to the hold bus, and dispatches one or more younger micro instructions therein that depend on the load micro instruction for execution after a number of clock cycles following dispatch of the first load micro instruction, and if it is indicated on the hold bus that the load micro instruction is the specified load micro instruction, the second reservation station is configured to stall dispatch of the one or more younger micro instructions until the load micro instruction has retrieved the operand. The plurality of prescribed resources includes system memory, coupled to the out-of-order processor via a memory bus, where the specified load micro instruction is known to resolve to write combining memory space in the system memory.