发明名称 不揮発性半導体記憶装置
摘要 A nonvolatile semiconductor memory device according to an embodiment includes: a memory cell array configured having NAND strings arranged therein; a plurality of word lines; a plurality of bit lines; a source line; and a control circuit configured to apply a verify voltage to a selected word line, apply a read pass voltage that renders conductive an unselected memory cell regardless of cell data to an unselected word line, and apply a bit line voltage of a certain value to a selected bit line, thereby executing a write verify operation that determines whether a selected memory cell has a desired threshold voltage or not. The control circuit is configured capable of changing a voltage value of the bit line voltage based on a position of the selected word line among the plurality of word lines relative to the NAND string.
申请公布号 JP5931822(B2) 申请公布日期 2016.06.08
申请号 JP20130186714 申请日期 2013.09.09
申请人 株式会社東芝 发明人 平井 竜太;椎野 泰洋
分类号 G11C16/02;G11C16/04;G11C16/06 主分类号 G11C16/02
代理机构 代理人
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