发明名称 |
METHOD OF ANALOG FRONT END OPTIMIZATION IN PRESENCE OF CIRCUIT NONLINEARITY |
摘要 |
A method for manufacturing a serial link including a channel and a receiver, the link including linear time-invariant elements, the receiver including a continuous-time linear equalizer (CTLE) including a nonlinear block, and a slicer having an input. The method includes: for each of a plurality of candidate CTLE configurations: calculating a first probability density function (PDF), corresponding to a first signal value, at the input of the nonlinear block, calculating a first PDF, corresponding to the first signal value, at the output of the nonlinear block; calculating a second PDF, corresponding to a second signal value, at the input of the nonlinear block, calculating a second PDF, corresponding to the second signal value, at the output of the nonlinear block; and calculating a bit error rate. |
申请公布号 |
US2016154923(A1) |
申请公布日期 |
2016.06.02 |
申请号 |
US201514928952 |
申请日期 |
2015.10.30 |
申请人 |
SAMSUNG DISPLAY CO., LTD. |
发明人 |
Malhotra Gaurav |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
1. A method for manufacturing a serial link comprising a channel and a receiver, the link comprising a plurality of linear time-invariant blocks, the receiver comprising a continuous-time linear equalizer (CTLE) comprising a nonlinear block having an input and an output, and a slicer having an input, the method comprising:
for each of a plurality of candidate CTLE configurations of the CTLE:
calculating a first probability density function (PDF), corresponding to a first signal value, at the input of the nonlinear block,calculating a first PDF, corresponding to the first signal value, at the output of the nonlinear block from the first PDF at the input of the nonlinear block;calculating a second PDF, corresponding to a second signal value, at the input of the nonlinear block,calculating a second PDF, corresponding to the second signal value, at the output of the nonlinear block from the second PDF at the input of the nonlinear block;calculating a bit error rate, from:
the first PDF at the output of the nonlinear block; andthe second PDF at the output of the nonlinear block; selecting a configuration, from among the candidate CTLE configurations, satisfying a criterion; and fabricating the CTLE with the selected configuration. |
地址 |
Yongin-City KR |