发明名称 INTEGRATED CIRCUIT COMPRISING CIRCUITRY TO CHANGE A CLOCK SIGNAL FREQUENCY WHILE A DATA SIGNAL IS VALID
摘要 Methods and apparatuses for communicating information are described. In some embodiments, a first integrated circuit (IC) provides a clock signal and a data signal to a second IC, wherein the data bits of the data signal are timed according to the clock signal, and wherein the frequency of the clock signal is capable of being changed even when the data signal is valid.
申请公布号 US2016156340(A1) 申请公布日期 2016.06.02
申请号 US201615015917 申请日期 2016.02.04
申请人 Rambus Inc. 发明人 Tsang Brian Hing-Kit;Zerbe Jared L.
分类号 H03K5/13;G11C7/10;G11C8/18;G11C7/22;H03K3/03;H03K7/06 主分类号 H03K5/13
代理机构 代理人
主权项 1. An integrated circuit (IC), comprising: a first node to output a clock signal having a clock signal frequency; a second node to output a data signal, wherein bits in the data signal are timed according to the clock signal; and circuitry to modify the clock signal frequency from a first frequency value to a second frequency value while the data signal is valid.
地址 Sunnyvale CA US