发明名称 METHOD FOR FORMING VIA-HOLE AND PRINTED WIRING BOARD
摘要 PROBLEM TO BE SOLVED: To provide a method for forming a via-hole, by which a tact time can be shortened.SOLUTION: A method for forming a via-hole comprises: a resist pattern forming step for forming a pattern of resist on a circuit of a substrate with the circuit; a mask-disposing step for disposing a mask over the pattern of resist; a thermosetting resin composition coating step for coating the substrate with the circuit with a thermosetting resin composition from above the mask; a curing step for curing the thermosetting resin composition; and a resist pattern removing step for removing the pattern of resist.SELECTED DRAWING: Figure 1
申请公布号 JP2016096330(A) 申请公布日期 2016.05.26
申请号 JP20150196604 申请日期 2015.10.02
申请人 TAIYO INK MFG LTD 发明人 NAKAJO TAKAYUKI;ENDO ARATA
分类号 H05K3/42;H05K1/11;H05K3/34;H05K3/40 主分类号 H05K3/42
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