Semiconductor device employing wafer level chip size package technology

摘要

A semiconductor device of the present invention includes a semiconductor chip; an internal pad for electrical connection formed on a surface of the semiconductor chip; a stress relaxation layer formed on the semiconductor chip and having an opening for exposing the internal pad; a connection pad made of a metal having solder wettability, formed on a part facing the opening of the internal pad and provided with a protruding portion protruding on the stress relaxation layer; a metal flange made of a metal having solder wettability, encompassing the periphery of the protruding portion and formed with a smaller thickness than a protruding amount of the protruding portion onto the stress relaxation layer; and a solder terminal for electrical connection with outside formed on the protruding portion and the metal flange.

主权项

1. A semiconductor device comprising:
a semiconductor chip; an internal pad for electrical connection formed on a surface of the semiconductor chip; a stress relaxation layer formed on the semiconductor chip and having an opening for exposing the internal pad; a connection pad made of a metal having solder wetability, the connection pad being formed on the stress relaxation layer such that the connection pad faces the internal pad through the opening, the connection pad having a protruding portion protruding upward from the stress relaxation layer, the protruding portion being wider than the opening in the stress relaxation layer, and the connection pad having a T-shaped cross section; a metal flange made of a metal having solder wetability, the metal flange being formed between the stress relaxation layer and the connection pad such that the metal flange has an edge portion projecting laterally with respect to the protruding portion; and a solder terminal for electrical connection with outside, the solder terminal making a solder joint with both the protruding portion and the edge portion of the metal flange, wherein all of an upper surface of the connection pad, a lower surface of the connection pad, and an upper surface of the metal flange which is arranged on the stress relaxation layer, are substantially flat and are disposed substantially parallel to the stress relaxation layer, wherein the T-shaped cross section of the connection pad includes a horizontal portion having a rectangular shape wider than the internal pad and extending substantially parallel to the stress relaxation layer and a vertical portion having a square portion in the opening of the stress relaxation layer and extending from the horizontal portion in a thickness direction of the stress relaxation layer, wherein the solder terminal covers a side surface of the horizontal portion of the connection pad and is in direct contact with an outer edge of the metal flange, and wherein the solder terminal has a peripheral portion that extends laterally over an annular portion of the upper surface of the metal flange, from the side surface of the horizontal portion of the connection pad to a position flush with a side edge of the metal flange.