发明名称 TRIPLE STACK SEMICONDUCTOR PACKAGE
摘要 In described examples, a method (100) for forming a stacked semiconductor package includes providing a bottom leadframe (LF) panel, including LFs downset each including terminals (101). Low side (LS) transistors are attached to the first die attach area (102). A first clip panel including first clips downset and interconnected are placed on the bottom LF panel (103). A dielectric interposer is attached on the first clips over the LS transistors (104). High side (HS) transistors are attached on the interposers (105). A second clip panel including second clips is mated to interconnect to the HS transistors, including mating together the second clip panel, first clip panel and bottom LF panel (106). The LFs can include a second die attach area, and a controller die attached on the second die attach area, and then pads of the controller die wire bonded to the terminals.
申请公布号 WO2016073622(A1) 申请公布日期 2016.05.12
申请号 WO2015US59059 申请日期 2015.11.04
申请人 TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS JAPAN LIMITED 发明人 EUGENE LEE, LEE HAN MENG @;BIN ABDUL AZIZ, ANIS FAUZI;FEN, SUEANN LIM WEI
分类号 H01L27/085 主分类号 H01L27/085
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